1. Field of the Invention
This invention relates to power converters, and more particularly, to the high-voltage power converters.
2. Description of the Prior Art
Generally, high-voltage power conversion applications require switching devices with high voltage ratings since the voltage rating of a switch is determined by the input and/or output voltage of the converter. For example, in conventional, isolated step-down converters, i.e., in converters with a transformer isolation that have the output voltage lower than the input voltage, the voltage stress on the primary-side switching devices is determined by the input voltage and the converter""s topology. The primary-side switches in bridge-type topologies such as half-bridge and fall-bridge converters are subjected to the minimal voltage stress that is equal to the input voltage. However, the voltage stress of the switches in single-ended topologies such as the single-switch forward and flyback converters is significantly higher than the input voltage.
Achieving a high efficiency in high-voltage applications is a major design challenge that requires the optimization of the conduction and switching losses through a careful selection of the converter topology and switching device characteristics. Namely, higher voltage rated semiconductor switches such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), IGBT (Insulated-Gate Bipolar Transistors), and BJTs (Bipolar Junction Transistors) exhibit larger conduction losses compared to their counterparts with a lower voltage rating. In addition, in high-voltage applications switching losses are also increased. Generally, switching losses can be reduced and even eliminated by resorting to a variety of resonant or soft-switching topologies. However, the approaches to reducing the conduction losses are much more limited. In fact, once the topology and the switches with the lowest conduction losses for the required voltage rating are selected, the only approach that can further decreases the conduction losses is to employ a topology that can utilize switches with a lower voltage rating and, consequently, a lower conduction loss. Since in the class of circuits known as multilevel converters primary-side switches operate with a voltage stress that is much less than the input voltage, the multilevel converters are a natural choice in high-voltage applications. So far, a number of multilevel dc/ac and dc/dc converters have been described in the literature.
As an example, FIG. 1 shows a three-level, zero-voltage-switched (ZVS) dc/dc converter introduced in article xe2x80x9cDC/DC Converter for High Input Voltage: Four Switches with Peak Voltage of VIN/2, Capacitive Turn-off Snubbing, and Zero-Voltage Turn-on,xe2x80x9d by I. Barbi et al., published in the IEEE Power Electronics Specialists"" Conf. Rec., pp. 1-7, 1998. The converter in FIG. 1 offers ZVS turn-on of all four primary switches and constant-frequency of operation with pulse-width-modulation (PWM) control with the voltage stress of the primary switches limited to VIN/2. However, because the circuit in FIG. 1 relies on the energy stored in the leakage inductance of transformer TR to create conditions for ZVS of switches Q2 and Q4, the ZVS of switches Q2 and Q4 can only be achieved in a very limited load range around the full load, unless the leakage inductance is significantly increased, or a relatively large external inductance is added in series with the primary winding of the transformer. It should be noted that in FIG. 1 the inductance of inductor L represents the sum of the leakage inductance of the transformer and the externally added inductance, if any. The increase of the inductance in series with the primary winding has a detrimental effect on the performance of the circuit because it reduces the effective secondary-side duty cycle and produces severe parasitic ringing due to the interaction of the inductance with the junction capacitance of the non-conducting secondary-side rectifier. Generally, the reduction of the secondary-side duty cycle needs to be compensated by a reduction of the turns ratio of the transformer, which increases the conduction losses on the primary side because the reflected load current into the primary of the transformer is also increased. To damp the parasitic ringing, a heavy secondary-side snubber circuit is required, which further degrades the conversion efficiency.
As another example, FIG. 2 shows a three-level, soft-switched dc/dc converter described in article xe2x80x9cA Zero Voltage Switching Three Level DC/DC Converter,xe2x80x9d by F. Canales et al., published in the Proceedings of IEEE International Telecommunications Energy Conference (INTELEC), pp. 512-517, 2000. The three-level converter in FIG. 2 also features ZVS turn-on of all four switches Q1 through Q4. In addition, by employing xe2x80x9cflying capacitorxe2x80x9d CB it also features a constant-frequency operation with the phase-shift control. The circuit in FIG. 2 utilizes the energy stored in the output-filter inductor to achieve ZVS of outer switches Q1 and Q4, and energy stored in the leakage inductance of the transformer to achieve ZVS of inner switches Q2 and Q3. As a result, ZVS of the outer switches can be achieved in a wide load range, whereas the ZVS range of the inner switches is very limited unless the leakage inductance is significantly increased, and/or a large external inductance is added in series with the primary winding. As already explained, the leakage inductance increase and/or the addition of an external inductor have a detrimental effect on the performance of the circuit.
Recently, a soft-switching full-bridge technique that achieves ZVS of the primary switches in the entire load and line range with virtually no loss of secondary-side duty cycle and with minimum circulating energy was described in patent application Ser. No. 09/652,869 filed Aug. 31, 2000, by Jang and Jovanovic. One implementation of this technique is shown in FIG. 3. The circuit in FIG. 3 utilizes the energy stored in the magnetizing inductance of coupled inductor LC to discharge the capacitance across the switch that is about to be turned on and, consequently, achieve ZVS. By properly selecting the value of the magnetizing inductance of the coupled inductor, the primary switches in the converter in FIG. 3 can achieve ZVS even at no load. Because in the circuit in FIG. 3 the energy required to create ZVS conditions at light loads does not need to be stored in the leakage inductance, the transformer leakage inductance can be minimized. As a result, the loss of the duty cycle on the secondary-side is minimized, which maximizes the turns ratio of the transformer and, consequently, minimizes the primary-side conduction losses. In addition, the minimized leakage inductance of the transformer significantly reduces the secondary-side ringing caused by the resonance between the leakage inductance and junction capacitance of the rectifier, which greatly reduces the power dissipation of a snubber circuit that is usually used to damp the ringing.
In this invention, the concept employed to achieve ZVS of the primary switches in the converter in FIG. 3 is extended to three-level converters.
In this invention, a number of three-level, constant-frequency, soft-switched isolated converters that can achieve substantially zero-voltage turn-on of the primary switches in a wide range of load current and input voltage are disclosed. Generally, these converters employ an inductor on the primary side of the isolation transformer to create ZVS conditions for the primary switches. In some embodiments the primary-side inductor is coupled inductor with two windings, whereas in the other embodiments the inductor has only one winding. The inductor and transformer are arranged in the circuit so that a change in the phase shift between the outer and inner pair of switches of the series connection of four switches changes the volt-second product on the windings of the transformer and the winding(s) of the inductor in opposite directions. Specifically, if the phase shift between the outer and inner pair of switches changes so that the volt-second product on the windings of the transformer decreases, the volt-second product on the windings of the inductor increases, and vice verse.
Because in the circuits of the present invention available energy for ZVS stored in the inductor increases as the load current decreases and/or input voltage increases, the circuits of the present invention can achieve ZVS in a very wide range of input voltage and load current, including no load.
In addition, since the energy used to create the ZVS condition at light loads is not stored in the leakage inductances of the transformer, the transformer""s leakage inductances can be minimized, which also minimizes the duty-cycle loss on the secondary side of the transformer. As a result, the converters of this invention can operate with the largest duty cycle possible, thus minimizing both the conduction loss of the primary switches and voltage stress on the components on the secondary side of the transformer, which improves the conversion efficiency. Moreover, because of the minimized leakage inductances, the secondary-side parasitic ringing caused by a resonance between the leakage inductances and the junction capacitance of the rectifier is also minimized so that the power dissipation of a snubber circuit usually required to damp the ringing is also reduced.
The circuits of the present invention can be either implemented as dc/dc converters, or dc/ac inverters. If implemented as dc/dc converters, any type of the secondary-side rectifier can be employed such, for example, the full-wave rectifier with a center-tap secondary winding, full-wave rectifier with current doubler, or a full-bridge full-wave rectifier.